Skip to main content
The effect of selective-area oxide thickening in metal–insulator–semiconductor (MIS) tunnel structures on their current–voltage characteristics was investigated in this article. Under a low applied voltage (<0.5 V), devices with the... more
The effect of selective-area oxide thickening in metal–insulator–semiconductor (MIS) tunnel structures on their current–voltage characteristics was investigated in this article. Under a low applied voltage (<0.5 V), devices with the oxide thickened at the gate edge conduct significantly larger currents compared to other devices with identical footprint. A qualitative explanation for this observation had been proposed in this article, which was found to be consistent with detailed investigations in the device electrical characteristics. The great enhancement in the current level for the edge-thickened (ET) device yields a high-current responsivity toward temperature and illumination under such a low voltage. It was found that the change in device current toward a 10 °C temperature rise was boosted <inline-formula> <tex-math notation="LaTeX">$> 100\times $ </tex-math></inline-formula> with respect to the device with thin-only oxide, and so was the photocurrent <inline-formula> <tex-math notation="LaTeX">$> 100\times $ </tex-math></inline-formula> larger under an illuminance of 100 lx. With such an improved sensing performance, the ET MIS tunnel diode may find its use in low-cost sensor applications.
The influence of local oxide thinning (LOT) spots on the electrostatics of MOS capacitors was studied in this work. The capacitors are found to suffer from severe deep depletion (DD) above threshold once LOT spots that cause significant... more
The influence of local oxide thinning (LOT) spots on the electrostatics of MOS capacitors was studied in this work. The capacitors are found to suffer from severe deep depletion (DD) above threshold once LOT spots that cause significant gate leakage are introduced, making them inapplicable for MOSFETs. With the help of simulation, we proposed the presence of a lateral electric field at the spot edge, which effectively drifts inversion charge toward the spot from its exterior, leading to severe depletion of inversion charge underneath the entire gate area. Capacitor size, spot size and spot thickness effects on the DD behavior were also investigated. This work demonstrates the high influence of LOT spots on device operations, as well as affirming the importance of oxide structural defect control.